Microprocessors used in dedicated systems usually employ Read Only Memories to store the controlling program. Usually more than one such memory module is required to store the fixed programs and values of constants used by the program. A single random access memory module is usually sufficient to store the variable data used by the system. The use of several modules, each storing a block of data, requires block decoding for each module. This block decoding requirement increases the number of logic devices needed to implement a given system. A fixed decoder, separate from the memory module, requires that the associated memory module occupy a certain physical position in the system, viz., the location to which the decoder output signal is provided.
Unless certain combinations of block sizes are used, there will be discontinuities in the valid address structure. That is, there may be invalid addresses within the range of the permitted addresses. This is explained in more detail below.
The invention set forth in this application describes a memory organization which reduces the number of devices required and permits some flexibility in the physical positioning of the Read Only Memories. No address discontinuities occur in the embodiment according to the invention.